New Cache Aware Scheduling Fixes Out For Testing

Since being merged back during the Linux 7.2 cycle, the Cache Aware Scheduling code continues seeing more fixes as users test out this scheduling enhancement on different processors and system configurations. Following last week's Cache Aware Scheduling fix for Intel hybrid CPUs, more material is available for testing this week for enhancing the code. As a reminder, Cache Aware Scheduling is the Linux kernel feature for grouping related tasks together on CPU cores that share the same last level cache (LLC). Cache Aware Scheduling can lead to better cache locality and lower latency by avoiding the costs of potential cache bouncing. These new fixes deal with tasks potentially being stranded from the outside or yanked away from their preferred last level cache. There is also a use-after-free fix too for the scheduling code. Intel engineer Tim Chen who has been leading the charge on Cache Aware Scheduling for the Linux kernel sent out this patch series collecting those recent fixes. Not addressed by this patch series, but there are also known issues with Cache Aware Scheduling interfering with Intel Turbo Boost Max Technology (ITMT). That work isn't addressed by these patches but hopefully some new improvements there will surface soon.